[WP76xx][HW] Pin logic during power-on sequence

Question:
Can you define all of pin logic during power-on sequence of WP76xx?
I suspect that WP76xx is worked Hi-Z(for Output pin) or Input.

Back Ground:
WP76xx is controlled some peripherals, so we need to care the pin logic by boot-up WP76xx.
That’s why I would like to know the all of pin logic.

Best Regards,

please check Product technical specification. It stated that if the pin is pull up/pull down or no pull.

Hi, jyijyi

please check Product technical specification. It stated that if the pin is pull up/pull down or no pull.

I understand it, but this spec is the definition after boot-up WP76xx.
I would like to know the pin status “during” boot-up WP76xx.

do you find any difference?

do you find any difference?

I could not confirm, because even if there is no difference of pin logic between before boot-up and after boot-up, I could not prove this specification because there is no definition.

For example, we think to use GPIO6 to control UART level shifter IC.
In this case, we can not decide the specification of GPIO6 during power-on sequence, so it may be caused malfunction to external IC.

In order to avoid miss control from WP module, we would like to know pin logic specification.

Sorry for inconvenient you.

Are you going to set the AT+WIOCFG=6,16 first ?
Are you going to set all the GPIO to be Embedded host usage in AT+WIOCFG?
BTW, do you want to confirm all the GPIO boot up status if they are no-pulled input?
If so, this is indeed a hardware topic, please contact Sierra FAE.