WP76 Second SPI Chip Select and DMA

1

Hi,
I need a second SPI chip select for our application. Both SPIs should be triggered by an interrupt and the data should be read with DMA.
I’d prefer to use le_gpio7 for the second chip select so I can test it on the mangoYellow before the real hardware arrives.

I know that I have to adjust the device tree, but unfortunately I don’t know which files and I don’t know which value.

Thanks in advance,
Simon

2

you can have a look and ask question here:

3

I already read every thread about a second SPI in this forum, but unfortunately nobody mentions which file I have to change. Also nobody added DMA or an IRQ.

  1. Which file do I have to modify for the chips selects?
  2. what do I have to adjust in this file to get gpio7 or preferably a pin from the outer ring of the module to be set up as a chip select?
  3. what do I need to add DMA support in there?
4

you can ask in that thread as that guy makes it to work.

5

This thread is 3 years old, I doubt that the guy is still listening on this.

Maybe you can hand the question over to one of your colleagues?

6

have you tried to change the state of gpio(which is used as CS) before you trigger the SPI read/write?

7

What do you mean? Triggering the chip select with a manual write via sysfs?

I already tried that and it’s way to slow. I need the fastest way to handle this. The fastest way should be a native chip select so I can use it with the IIO interface. Therefore I also need a interrupt pin, which also needs to be setup in the device tree, as far as I’m aware.

8

did you make it work with the interrupt and native CS pin?

9

yes, but it’s way to slow.
The interrupt latency is jittering between 5us (which would be good) and 2.4ms (which is way to slow).
Also reading without DMA put a break between every byte that is around 2.2us long, which is also way to slow, because reading 512 bytes then takes around 4.1 ms. So over two thirds of the time is spend in this breaks.

10

I need a native second SPI chip select. Otherwise I won’t be able to write 2 IIO drivers for the 2 sensors connected.
The IIO interface and it’s ringbuffers and triggers should be able to mitigate all other problems regarding latency (as far as I’m aware).

So the question is: Which is the correct dts file to adjust?

11

no experience on this, but you might try these files:

./kernel/arch/arm/boot/dts/qcom/mdm9607.dtsi
./kernel/arch/arm/boot/dts/qcom/mdm9607-swi-ar-mft.dtsi
./kernel/arch/arm/boot/dts/qcom/mdm9607-cdp.dtsi
./kernel/arch/arm/boot/dts/qcom/mdm9607-swi.dtsi
./kernel/arch/arm/boot/dts/qcom/mdm9607-swi-ar.dtsi
./kernel/arch/arm/boot/dts/qcom/mdm9607-swi-mft.dtsi
./kernel/arch/arm/boot/dts/qcom/mdm9607-wp76xx.dtsi
./kernel/arch/arm/boot/dts/qcom/mdm9607-pinctrl.dtsi
./kernel/arch/arm/boot/dts/qcom/mdm9607-mtp.dtsi

12

I don’t want to poke around. I don’t have time to poke around. And as far as I’m aware, it should be a dts and not a dtsi file.

Can you hand me over to someone who as experience in this?

13

Then please contact local distributor and state your business case to speed up the investigation