WP7607-1 App cannot control DCD signal

For the new batches of WP7607-1 using FW 13.1, the application cannot control the gpio pin associated with the DCD signal. The App uses the literal gpio pin “DCD”. On older WP7607 chips using FW prior to 13.1 the “DCD” gpio can be exported, configured as out direction and really controls the DCD signal. With FW 13.1 the “DCD” gpio cannot be exported and thus the App cannot control it. We guess that a kerne module is missing or not loaded:

root@swi-mdm9x28-wp:~# echo DCD > /sys/class/gpio/export
sh: write error: Operation not permitted

The GPIOs for the old chips/firmware:
root@swi-mdm9x28-wp:/# ls -ll /sys/class/gpio
–w------- 1 root root 4096 Jan 6 00:00 export
lrwxrwxrwx 1 root root 0 Jan 6 00:00 gpioDCD → …/…/devices/1000000.pinctrl/gpio/gpioDCD
lrwxrwxrwx 1 root root 0 Jan 6 00:00 gpioRI → …/…/devices/1000000.pinctrl/gpio/gpioRI
lrwxrwxrwx 1 root root 0 Jan 6 00:06 gpiochip0 → …/…/devices/1000000.pinctrl/gpio/gpiochip0
lrwxrwxrwx 1 root root 0 Jan 6 00:00 gpiochip1 → …/…/devices/virtual/gpio/gpiochip1
lrwxrwxrwx 1 root root 0 Jan 6 00:06 gpiochip1012 → …/…/devices/qpnp-pin-7/gpio/gpiochip1012
lrwxrwxrwx 1 root root 0 Jan 6 00:06 gpiochip1018 → …/…/devices/qpnp-pin-6/gpio/gpiochip1018
lrwxrwxrwx 1 root root 0 Jan 6 00:06 gpiochip200 → …/…/devices/78b8000.i2c/i2c-4/4-003a/swimcu-gpio/gpio/gpiochip200
lrwxrwxrwx 1 root root 0 Jan 6 00:06 gpiochip820 → …/…/devices/soc:qcom,smp2pgpio-ssr-smp2p-1-out/gpio/gpiochip820
lrwxrwxrwx 1 root root 0 Jan 6 00:06 gpiochip852 → …/…/devices/soc:qcom,smp2pgpio-ssr-smp2p-1-in/gpio/gpiochip852
lrwxrwxrwx 1 root root 0 Jan 6 00:06 gpiochip884 → …/…/devices/soc:qcom,smp2pgpio-smp2p-1-out/gpio/gpiochip884
lrwxrwxrwx 1 root root 0 Jan 6 00:06 gpiochip916 → …/…/devices/soc:qcom,smp2pgpio-smp2p-1-in/gpio/gpiochip916
lrwxrwxrwx 1 root root 0 Jan 6 00:06 gpiochip948 → …/…/devices/soc:qcom,smp2pgpio-smp2p-15-out/gpio/gpiochip948
lrwxrwxrwx 1 root root 0 Jan 6 00:06 gpiochip980 → …/…/devices/soc:qcom,smp2pgpio-smp2p-15-in/gpio/gpiochip980
–w------- 1 root root 4096 Jan 6 00:06 unexport

and for the 13.1 (notice that “gpioDCD” is missing):

root@swi-mdm9x28-wp:/sys/class/gpio# ls -ll
–w------- 1 root root 4096 Jan 6 00:00 export
lrwxrwxrwx 1 root root 0 Jan 6 00:00 gpioRI → …/…/devices/1000000.pinctrl/gpio/gpioRI
lrwxrwxrwx 1 root root 0 Jan 6 00:01 gpiochip0 → …/…/devices/1000000.pinctrl/gpio/gpiochip0
lrwxrwxrwx 1 root root 0 Jan 6 00:00 gpiochip1 → …/…/devices/virtual/gpio/gpiochip1
lrwxrwxrwx 1 root root 0 Jan 6 00:01 gpiochip1012 → …/…/devices/qpnp-pin-7/gpio/gpiochip1012
lrwxrwxrwx 1 root root 0 Jan 6 00:01 gpiochip1018 → …/…/devices/qpnp-pin-6/gpio/gpiochip1018
lrwxrwxrwx 1 root root 0 Jan 6 00:01 gpiochip200 → …/…/devices/78b8000.i2c/i2c-4/4-003a/swimcu-gpio/gpio/gpiochip200
lrwxrwxrwx 1 root root 0 Jan 6 00:01 gpiochip820 → …/…/devices/soc:qcom,smp2pgpio-ssr-smp2p-1-out/gpio/gpiochip820
lrwxrwxrwx 1 root root 0 Jan 6 00:01 gpiochip852 → …/…/devices/soc:qcom,smp2pgpio-ssr-smp2p-1-in/gpio/gpiochip852
lrwxrwxrwx 1 root root 0 Jan 6 00:01 gpiochip884 → …/…/devices/soc:qcom,smp2pgpio-smp2p-1-out/gpio/gpiochip884
lrwxrwxrwx 1 root root 0 Jan 6 00:01 gpiochip916 → …/…/devices/soc:qcom,smp2pgpio-smp2p-1-in/gpio/gpiochip916
lrwxrwxrwx 1 root root 0 Jan 6 00:01 gpiochip948 → …/…/devices/soc:qcom,smp2pgpio-smp2p-15-out/gpio/gpiochip948
lrwxrwxrwx 1 root root 0 Jan 6 00:01 gpiochip980 → …/…/devices/soc:qcom,smp2pgpio-smp2p-15-in/gpio/gpiochip980
–w------- 1 root root 4096 Jan 6 00:01 unexport

The kernel version in both cases is the same (3.18.131)

the UART1 DCD signal cannot be controlled by default.
you need to download the yocto source and make those pin to be GPIO and then rebuild the yocto image: