# Controlling DCD, DTR, DSR lines by legato application **URL:** \ **Category:** Uncategorized\ **Created:** [December 13, 2018, 1:12pm UTC](https://forum.legato.io/t/controlling-dcd-dtr-dsr-lines-by-legato-application/3944 "2018-12-13T13:12:40Z")\ **Posts on this page:** 16\ **Page:** 1
**Author:** ![AE\_1](https://avatars.discourse-cdn.com/v4/letter/a/a88e57/32.png) [@AE\_1](https://forum.legato.io/u/AE_1)\ **Post date:** [December 13, 2018, 1:12pm UTC](https://forum.legato.io/t/controlling-dcd-dtr-dsr-lines-by-legato-application/3944/1 "2018-12-13T13:12:40Z")
Hello, It is possible to control the DCD, DTR and DSR from my legato application, so I can use them like GPIO? !RIOWNER can be used only for Ring Indicator. ---
**Author:** ![jyijyi](https://sea1.discourse-cdn.com/flex019/user_avatar/forum.legato.io/jyijyi/32/822_2.png) [@jyijyi](https://forum.legato.io/u/jyijyi)\ **Post date:** [December 14, 2018, 3:46am UTC](https://forum.legato.io/t/controlling-dcd-dtr-dsr-lines-by-legato-application/3944/2 "2018-12-14T03:46:48Z")
have you tried this? > **[Controlling the RTS and DTR pins of Serial Port in Linux | xanthium enterprises](https://www.xanthium.in/Controlling-RTS-and-DTR-pins-SerialPort-in-Linux)** > > Controlling the RTS and DTR pins of Serial Port on Linux using ioctl() calls in C lanuage . ---
**Author:** ![AE\_1](https://avatars.discourse-cdn.com/v4/letter/a/a88e57/32.png) [@AE\_1](https://forum.legato.io/u/AE_1)\ **Post date:** [December 17, 2018, 2:16pm UTC](https://forum.legato.io/t/controlling-dcd-dtr-dsr-lines-by-legato-application/3944/3 "2018-12-17T14:16:46Z")
Hi jyijyi, I tried that. But DCD output remains the same. No changes on the pin. I believe that works only on DTE, as the module is DCE. On following release note is mentioned that if AT!RIOWNER is set tp APP, DCD line can be controlled by legato app. But when I tried, in see only gpioRI on the /sys/class/gpio. Resolves: LXSWI9X1517-73 * * * Add support for UART1 DSR, DCD, DTR lines refs/changes/30/9530/3 Currently, UART1 RI is supported and can be configured for modem or apps using AT!RIOWNER. This change extends the mechanism used to control/configure RI to DSR, DCD and DTR. if AT!RIOWNER is set to apps, then RI, DSR, DCD and DTR will be available for export in sysfs and are mapped to gpio 16, 17, 18, and 19, respectively. ---
**Author:** ![jyijyi](https://sea1.discourse-cdn.com/flex019/user_avatar/forum.legato.io/jyijyi/32/822_2.png) [@jyijyi](https://forum.legato.io/u/jyijyi)\ **Post date:** [December 18, 2018, 2:02am UTC](https://forum.legato.io/t/controlling-dcd-dtr-dsr-lines-by-legato-application/3944/4 "2018-12-18T02:02:44Z")
I just tried on my WP8548 (legato version: 16.10.4). You can first set at!riowner=1, after you can type the following: echo RI \> /sys/class/gpio/export echo DTR \> /sys/class/gpio/export echo DCD \> /sys/class/gpio/export echo DSR \> /sys/class/gpio/export ls /sys/class/gpio gpioDCD gpioDSR gpioDTR gpioRI ---
**Author:** ![AE\_1](https://avatars.discourse-cdn.com/v4/letter/a/a88e57/32.png) [@AE\_1](https://forum.legato.io/u/AE_1)\ **Post date:** [December 18, 2018, 1:03pm UTC](https://forum.legato.io/t/controlling-dcd-dtr-dsr-lines-by-legato-application/3944/5 "2018-12-18T13:03:47Z")
Hi jyijyi, we are using the WP7607-1 [legato: 18.06.3]. On this modul, only gpioRI is supported. root@swi-mdm9x28-wp:~# echo RI \> /sys/class/gpio/export root@swi-mdm9x28-wp:~# echo DCD \> /sys/class/gpio/export sh: write error: Operation not permitted root@swi-mdm9x28-wp:~# echo DSR \> /sys/class/gpio/export sh: write error: Operation not permitted root@swi-mdm9x28-wp:~# echo DTR \> /sys/class/gpio/export sh: write error: Operation not permitted root@swi-mdm9x28-wp:~# Do you know if the DCD/DSR/DTR lines will be supported in the futurte release? ---
**Author:** ![jyijyi](https://sea1.discourse-cdn.com/flex019/user_avatar/forum.legato.io/jyijyi/32/822_2.png) [@jyijyi](https://forum.legato.io/u/jyijyi)\ **Post date:** [December 19, 2018, 4:23am UTC](https://forum.legato.io/t/controlling-dcd-dtr-dsr-lines-by-legato-application/3944/6 "2018-12-19T04:23:53Z")
I believe the 8 wire UART is supported since FW REL 10 for WP76. have you tried AT&D AT&S AT&C these commands to control those pins? ---
**Author:** ![AE\_1](https://avatars.discourse-cdn.com/v4/letter/a/a88e57/32.png) [@AE\_1](https://forum.legato.io/u/AE_1)\ **Post date:** [December 19, 2018, 1:35pm UTC](https://forum.legato.io/t/controlling-dcd-dtr-dsr-lines-by-legato-application/3944/7 "2018-12-19T13:35:17Z")
Hi jyijyi, the commands will not help. We have to controlle the lines by legatp app. It would be perfect when you will check if it is planning to implemet the supporting for UART1 DSR, DCD, DTR by using the AT!RIOWNER to be able to use gpioDCD gpioDSR gpioDTR? Thanks… ---
**Author:** ![jyijyi](https://sea1.discourse-cdn.com/flex019/user_avatar/forum.legato.io/jyijyi/32/822_2.png) [@jyijyi](https://forum.legato.io/u/jyijyi)\ **Post date:** [December 21, 2018, 3:47am UTC](https://forum.legato.io/t/controlling-dcd-dtr-dsr-lines-by-legato-application/3944/8 "2018-12-21T03:47:29Z")
you can still send those AT command in legato app. BTW, it seems there is no such implementation as you mentioned for WP76… ---
**Author:** ![AE\_1](https://avatars.discourse-cdn.com/v4/letter/a/a88e57/32.png) [@AE\_1](https://forum.legato.io/u/AE_1)\ **Post date:** [December 21, 2018, 10:59am UTC](https://forum.legato.io/t/controlling-dcd-dtr-dsr-lines-by-legato-application/3944/9 "2018-12-21T10:59:28Z")
Hi jyijyi, we have to emulate CSD Call using TCP/IP connection via UART1 (Customer Linux application mode). We have to trigger the DCD line, when UART1 goes into data mode and when it goes back into command mode. That’y why we need to controll. The at commands whoch you mentioned will not help. ---
**Author:** ![AE\_1](https://avatars.discourse-cdn.com/v4/letter/a/a88e57/32.png) [@AE\_1](https://forum.legato.io/u/AE_1)\ **Post date:** [January 8, 2019, 2:14pm UTC](https://forum.legato.io/t/controlling-dcd-dtr-dsr-lines-by-legato-application/3944/10 "2019-01-08T14:14:27Z")
Hi jyijyi, can you please tell me if gpioDCD gpioDSR gpioDTR will be supported on WP76 on the next releases? ---
**Author:** ![jyijyi](https://sea1.discourse-cdn.com/flex019/user_avatar/forum.legato.io/jyijyi/32/822_2.png) [@jyijyi](https://forum.legato.io/u/jyijyi)\ **Post date:** [January 9, 2019, 4:45am UTC](https://forum.legato.io/t/controlling-dcd-dtr-dsr-lines-by-legato-application/3944/11 "2019-01-09T04:45:58Z")
I don’t see there is such implementation on the coming release on WP76. However, I check the code (yocto/kernel/driver/gpio/gpiolib.c) of yocto of WP8548. I guess it is not difficult to implement. In WP76 yocto source code (yocto/kernel/driver/gpio/gpiolib-sysfs.c) , you can add some new GPIO in ext\_gpio\_map ext\_gpio\_wp: {“101”,xx,FUNCTION\_EMBEDDED\_HOST}, {“102”,xx,FUNCTION\_EMBEDDED\_HOST}, {“103”,xx,FUNCTION\_EMBEDDED\_HOST}, And map those xx number to the MDM CHIP UART DCD/DTR/DSR. After that you should be able to control in console like: echo 101 \> /sys/class/gpio/export echo out \> /sys/class/gpio/gpio101/direction echo 1 \> /sys/class/gpio/gpio101/value echo 102 \> /sys/class/gpio/export echo out \> /sys/class/gpio/gpio102/direction echo 1 \> /sys/class/gpio/gpio102/value echo 103 \> /sys/class/gpio/export echo out \> /sys/class/gpio/gpio103/direction echo 1 \> /sys/class/gpio/gpio103/value Currently I don’t have the information of xx of MDM CHIP UART number. And there might be potential issue that the 8-wire UART may also control those pins. I think you need to contact distributor of your region for the xx information or ask them for this new feature development in coming release. ---
**Author:** ![AE\_1](https://avatars.discourse-cdn.com/v4/letter/a/a88e57/32.png) [@AE\_1](https://forum.legato.io/u/AE_1)\ **Post date:** [April 2, 2019, 11:10am UTC](https://forum.legato.io/t/controlling-dcd-dtr-dsr-lines-by-legato-application/3944/12 "2019-04-02T11:10:39Z")
Hell all, does anybody know the gpio number of DCD, DTR and DSR? I would like to add it to map ext\_gpio\_wp like RI. static struct ext\_gpio\_map ext\_gpio\_wp={ {“1”, -1,FUNCTION\_UNALLOCATED}, {“2”, 38,FUNCTION\_UNALLOCATED}, … {“M4”, -1,FUNCTION\_UNALLOCATED}, {GPIO\_NAME\_RI,25,FUNCTION\_UNALLOCATED} }; ---
**Author:** ![cchenry](https://avatars.discourse-cdn.com/v4/letter/c/a183cd/32.png) [@cchenry](https://forum.legato.io/u/cchenry)\ **Post date:** [April 3, 2019, 12:11am UTC](https://forum.legato.io/t/controlling-dcd-dtr-dsr-lines-by-legato-application/3944/13 "2019-04-03T00:11:08Z")
Hi AE\_1, Try: DCD = GPIO24 DTR = GPIO17 DSR = GPIO36 BR, Chris ---
**Author:** ![AE\_1](https://avatars.discourse-cdn.com/v4/letter/a/a88e57/32.png) [@AE\_1](https://forum.legato.io/u/AE_1)\ **Post date:** [April 8, 2019, 10:04am UTC](https://forum.legato.io/t/controlling-dcd-dtr-dsr-lines-by-legato-application/3944/14 "2019-04-08T10:04:04Z")
Hi Chris, the GPIO24 for DCD is correct. But the number GPIO36 for DSR seems to be wrong. When I use this number, I see that CTS is addressed. GPIO17 for DTR also seems to be wrong. I am using WP76xx … ---
**Author:** ![jyijyi](https://sea1.discourse-cdn.com/flex019/user_avatar/forum.legato.io/jyijyi/32/822_2.png) [@jyijyi](https://forum.legato.io/u/jyijyi)\ **Post date:** [April 9, 2019, 8:07am UTC](https://forum.legato.io/t/controlling-dcd-dtr-dsr-lines-by-legato-application/3944/15 "2019-04-09T08:07:39Z")
i remember those numbers are correct for DCD,DTR and DSR. ---
**Author:** ![cchenry](https://avatars.discourse-cdn.com/v4/letter/c/a183cd/32.png) [@cchenry](https://forum.legato.io/u/cchenry)\ **Post date:** [April 9, 2019, 4:19pm UTC](https://forum.legato.io/t/controlling-dcd-dtr-dsr-lines-by-legato-application/3944/16 "2019-04-09T16:19:09Z")
Hi AE\_1, I’ve double checked, those numbers are correct. Can you please double check on your side? BR, Chris